Computer users continue to demand increased performance from the computer systems being made available in the marketplace. Of particular interest have been computer systems with improved display subsystems which provide, among other things, color images, improved image definition, and windowing. Such improvements in display technology not only make the display screens more aesthetically pleasing to the user but also generally make the system easier to use, both important marketing considerations.
Recent development efforts in display technology have been directed at providing display systems which manage and mix both graphics data and video data in a windowing environment. In addition to controlling the content of various sections (windows) of the display screens, these display systems must also establish compatibility between the display device and the graphics and video data sources. In the case of graphics data, the display control circuitry must be capable of driving a given display from data received from various sources (for example, VGA, CGA, VRAM) as well as in varying formats (for example, varying numbers-of bits per pixel and/or varying numbers of bits per each color word in a pixel). Similarly, in the case of video data, the display control circuitry must be capable of handling input data in a variety of formats, such as RGB and YUV, and of varying the numbers of bits per pixel and/or bits per color. All these considerations must be made in view of the ever increasing data transfer speed.
The display interface devices (DACs), which in the past typically linked only the graphics and/or video sources to the system display, in particular face significant demands with the inclusion of video. In the case of video, these interface devices must be capable of receiving the data in varying formats, converting that data as necessary into a digital color data format compatible with the display, and finally converting the digital color data into equivalent analog signals for the actual driving of the display device. Not only must the display interface device provide all these processing features while operating at the demanded high speeds, but also must account for typical differences between the clocking of video data from the video processor to the video frame buffer and the clocking of data to the display unit (the clocking of the display unit is typically controlled by the CRT controller in the graphics controller). Specifically, the video source generates video data using a first time base (clock) while data is transferred to the display using a second time base (clock). Unless this difference in timing is accounted for, in view of all the other considerations, it is difficult to efficiently generate the desired images on the display screen.
The use of first-in/first-out memories (FIFOs) to interface the transfer of video and/or graphics data between processing devices operating on different time bases (clocks) is known in the art. These uses of FIFOs have not however addressed the problems associated with inputing different data and/or control words from different sources, such as a processor and a memory, using a first clock and output the received data/control words with a second clock.
Thus the need has arisen for an improved digital display interface device which provides high speed video processing, especially in a mixed graphics/video display environment.